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DC bias characteristics of MLCC capacitors

DC bias characteristics of MLCC capacitors

November 20, 2025

When designing switching power supply circuits, we typically calculate the output ripple using the following formula:

If the capacitor used is an MLCC (Multi-Layer Ceramic Capacitor), its ESR is negligible due to its very low value. Therefore, based on the input/output voltage, switching frequency, and target ripple, the capacitance can be calculated using the following formula:

However, the capacitance value calculated using the above formula resulted in a larger output ripple during actual testing. Why is this? This is because MLCC (Multi-Layer Ceramic Capacitors) have a DC bias characteristic: applying a DC voltage to the capacitor reduces its capacitance.

 

Figure 1 below shows the DC bias characteristic of Murata's 22uF/10V capacitor.

Figure 1

As can be seen, when a DC voltage of 5V is applied to the capacitor, its capacitance is reduced to approximately 50% of its initial value. The DC bias characteristic of MLCC capacitors is very pronounced; the larger the capacitance, the faster the capacitance decreases with increasing voltage, which must be considered in circuit design. Generally, the DC bias characteristics of MLCC capacitors have the following characteristics:

 

① The larger the capacitance, the more pronounced the bias characteristic; the capacitance decreases more with increasing voltage.

 

② For capacitors of the same capacitance but different voltage ratings, the capacitance decreases approximately the same under the same voltage (there is no capacitor with a high voltage rating that decreases less).

 

③ For capacitors of the same capacitance and voltage rating, the larger the package, the slower the capacitance decreases.

 

The capacitance decay of MLCCs is an objective reality. Design should be based on the capacitance under the actual bias voltage, not the nominal capacitance. For example, if a circuit requires a 10uF capacitor, and an X7R type MLCC (10V rated) is selected, with an actual bias voltage of 5V (at which point the capacitance decays by approximately 50%), then two capacitors with a nominal capacitance of 10uF should be connected in parallel to ensure that the actual capacitance meets the requirement.

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